One thing you might want to look into is the SAN caching. This is what helps EMC writes (and most SANs). Over the years, EMC has kind of learned some tricks about caching writes that have eliminated a lot of the need for manual tuning of this. I am not familiar with Tintri - but you may need to explore how the SAN cache is setup and if they have allocated a lot for reads, change it to allocate most (90%+) for writes. There also may be write cache policies due to whether battery backup is available and/or a second controller (where write cache may be duplicated to if the cache is on the controller vs. the frame itself).... The former is likely not so much the problem, but the latter could be a difference... So you may need to learn a bit more about the physics of Tintri and EMC to see if the difference is something that (unfortunately) you end up living with....
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